Modeling and simulation of SiC MOSFET turn-off oscillation under influence of parasitic parameter

Abstract

SiC MOSFET has gradually obtain more attention in the field of power converter, due to its good performance of high blocking voltage and fast switching speed. However, fast switching transient process makes it more sensitive to parasitic parameters than the silicon counterparts, leading to the more electrical stress. In serious cases, device failure or damage may directly occur. In addition, switching oscillation interacting between the circuit stray inductance and parasitic capacitance will result in more switching losses and undesirable electromagnetic interference noise. In the paper, simple and effective simulating models taken account of all key parameter are established for the analysis of the oscillation frequency and voltage overshoot in turn-off process of SiC MOSFET. Simulation and experiments both show that turn-off oscillation frequency is determined by SiC MOSFET output parasitic capacitance and power loop parasitic inductance. Moreover, turn-off maximum peak voltage will shift regularly with various switching speed.