Abstract

Memristor’s electrical behavior can be defined as inter-relationship between electric charge and magnetic flux. Memristor exhibit memory characteristics. Its present state resistance depends on the amount of charge passed through it in particular direction previously. This varying resistance property can be used as non-volatile memory property. Memristor have very steep off to on transitions with a large on-off resistance ratio. A device with more control terminal offer superior control over its characteristics than two-terminal devices. The unique characteristics of memristor along with long retention time and low complex device geometry make them ideal to model them as three-terminal devices. The prime objective of this paper is to model a drift based three terminal memristive (Gated Memristor) device that possess same memory, current characteristics and pinched hysteresis effect that of a two-terminal device. Further, the modeled device can be used to realize various novel digital and analog circuits. Device is modeled using Verilog-A language and simulated using Cadence Virtuoso environment.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.