Modeling and simulation for ESD protection circuit design and optimization

Abstract

An overview of the application of modeling and simulation methodologies for ESD protection circuit design optimization is presented. This methodology will reduce the development cycle time and costs and consists of a device compact model definition valid under ESD conditions and circuit level optimization of the protection circuits. This enables to extract information on the ESD robustness of the product at pre-silicon phase and could lead to first-time-right product designs.