Abstract
Trench isolation and SOI substrates have made is possible to integrated high voltage devices together with low voltage circuitry, due to the total galvanic isolation. However, the trenches and the buried oxide of the SOI substrate do affect the total capacitance of the high voltage devices, and give rise to capacitive coupling between adjacent cells. In order to predict those effects, equivalent circuit models are developed in this paper. The models are physically based, and the model parameters are determined by analytical expressions using the geometry of the structures. The models are shown to provide good accuracy in a wide frequency range in comparison to simulated and measured data.
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