Abstract
Single Event Upsets (SEUs), bit flips caused when a high-energy particle strikes a sensitive node in a microelectronic device, are an increasing problem with advances in technologies. With submicron devices available today, electronics are vulnerable to SEUs at both space-based and avionic altitudes. This paper focuses on SEUs in avionic systems induced by atmospheric neutrons; atmospheric neutrons are produced in nuclear reactions of cosmic rays reacting with air molecules. The soft error rate (SER) of CMOS device models due to atmospheric neutrons for deep submicron technologies were computed at various altitudes and latitudes using Total Space and Atmospheric Effects on Microelectronics (TSAREME) developed at Boeing. Model predictions of the SER for 350 and 600 nm CMOS representative of 1992 and 1994 were 1.8 and 3 upsets per day, respectively. Predictions of 9.8 and 11.6 upsets per day were made for 100 and 50 nm CMOS devices representing the technologies of today. These observations taken together indicated that the SER increased with decreasing feature size at a rate less than linear for sizes below 100 nm. This linear trend of the SER with feature size is in agreement with empirical and semi-empirical observations. The paper also indicated that materials commonly used to fabricate chips such as borophosilicate glass (BPSG) and shielding by high Z metals such as tantalum significantly increased the SER and so should be avoided. The results all indicate that atmospheric neutrons are an important consideration in determining the radiation hardness of avionic systems with very-large-scale integration (VLSI) units.
Published Version
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