Abstract

Mobility degradation during gate length scaling is a well established experimental fact, which is confirmed also by Monte –Carlo simulation. We have analyzed the physical reason for this degradation using experimental and modeling data obtained in classic drift-diffusional approximation with electric field dependences of electron mobility. We have shown that this dependence is a main reason for mobility degradation in nanoscale FETs, which means also that the same reason will limit the drain current in future post-silicon CMOS generation with new materials like narrow band III/V compounds or graphene with the highest carrier velocity near 108 cm/s.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call