Model and performance of hot-electron MOS transistors for VLSI

Abstract

Listen

Translate article

VLSI reduces the dimensions of MOS transistors so far that the product of channel length L and hot-electron critical field E C becomes comparable to or smaller than the transistor operating voltages. These transistors are classified as hot-electron MOS (HEMOS) transistors. On the basis of a hyperbolic velocity-field characteristic, a powerful nonlinear analytical model both for conductive and capacitive contributions is presented, which covers the triode and saturation regions continuously. The crucial parameter is the pinch-off field E G , for which a sensitive measurement technique is described. Static and dynamic simulations are in good agreement with 2-µm transistors and circuits, self-aligned by ion implantation. Expressions are developed for transistor transconductance, output resistance, available voltage gain, and effective input capacitance as well as inverter supply voltage, threshold voltages, ratio, noise margin, power dissipation, and delay time. These quantities are in terms of the characteristic product of channel length L and pinch-off field E G so that the effects of scaling into the submicron regime can be predicted as demonstrated by the design parameter set for a 5-fJ inverter with a 0.5-µm HEMOS driver transistor.