Mobility Degradation Models for Electrons in Inversion Layers of Silicon

Abstract

Carrier mobility in silicon inversion layers is an important parameter that reflects carrier transport mechanisms. It is very important to accurately model the effective mobility of carriers for the accurate calculation of the drain current using device simulation programs. This becomes more important in submicron devices using higher substrate doping, thinner gate dielectrics, and much higher electric fields. Several models for the effective mobility of carriers, as a function of the effective transverse electric field in MOS inversion layers have been reported. Extraction from experimental data of parameters best fitting to an empirical formula has been used. To find out the physically appropriate model for mobility of inversion layer electrons at room temperature, we compare calculated effective mobility versus transverse electric field using recently reported empirical model for mobility degradation. The drift velocity versus electric field characteristics were calculated, using different models for mobility degradation, and compared to previously reported experimental results. The MOSFET saturation drain current, which is of most importance because of its effect on circuit speed, was calculated using these models and compared to recent theoretical and experimental results that take the effects of mobility degradation, velocity saturation and series resistance into consideration.