Abstract
Inter-cell interference (ICI) significantly affects the reliability of flash memory. Both horizontal and vertical ICI have been taken into account for the errors in flash memory. In this paper, we propose a two-dimensional hierarchical constrained code (2D-HCC) to mitigate both horizontal and vertical ICIs of flash memory. The proposed scheme is applied to both single-level cell (SLC) and multi-level cell (MLC) flash memory. Finally, the bit error rate (BER) of the proposed 2D-HCC with/without Bose-Chaudhuri-Hocquenghem (BCH) codes is simulated. The simulated results confirm the advantage of the proposed scheme.
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