Abstract

A precise high-level energy model is required for the development and efficiency characterization of on-chip low-power coding and stochastic techniques. The misalignment effect, that is the variation in the delay of the transmitted signals, is conventionally overlooked. This work presents the first high-level misalignment-aware energy model for narrow multi-segment global interconnects. The proposed model has been experimentally validated using a commercial [65]nm technology. Results show a significant improvement in the accuracy of the energy estimation. For instance, the normalized mean square error of the standard model, 8.293%, is reduced to 0.998% by the proposed approach for a typical structure of a 5-wire bus. Furthermore, a case study is used to assess the proposed model using classical bus invert and full invert low-power coding schemes.

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