Microstructural studies by transmission electron microscopy of the formation of ultrathin PtSi layers with novel silicidation processes

Abstract

Ultrathin and uniform Pt-silicide layers are prepared by electron beam evaporation on a heated silicon substrate and by magnetron sputtering at room temperature followed by rapid thermal annealing (RTP) and selective etching, respectively. In the electron-beam deposited samples, continuous Pt-silicide layers of 6–8 nm thickness are formed after thermal annealing. The interfaces between the silicide layers and the silicon substrate are not atomically flat. In the case of the sputtered Pt, continuous PtSi layers down to 3 nm thick can be produced by using two-step (low-high temperature) and modified two-step (selective etch and high-temperature anneal) RTP silicidation processes. In one-step (high-temperature) processed samples, PtSi is the dominant phase; meanwhile, a small fraction of Pt12Si5 phase is inhomogeneously distributed in the case of thicker PtSi layers. In the two-step RTP processed samples, a Pt/Pt2Si/PtSi/Si layered structure is formed after the first RTP step. The first anneal step is found to be crucial for the roughness and epitaxy of the final PtSi layer. The best Schottky barrier heights are found to be 0.249 eV for the 3 nm PtSi/p-Si(100) Schottky diodes. The e-beam and the sputtered PtSi layers follow different epitaxial growth models.