Microfabrication Challenges for Silicon-based Large Area (>500 mm2) 3D-manifolded Embedded Microcooler Devices for High Heat Flux Removal

Abstract

3D Manifolded embedded Micro-Coolers (3DMMC) devices are becoming increasingly attractive and thereby, sought after active cooling solutions for high power density electronic components and devices. 3D-MMCs have shown the potential to effectively cool extreme levels of heat flux, characteristic of high- power density electronics and microprocessors. Despite numerous studies that have experimentally demonstrated promising performance of small area (25 mm2) micro-coolers, the challenges associated with fabrication of large area (>500 mm2) have not been adequately discussed or documented. This study discusses in details, a well validated, repeatable and reliable process flow for making 3D-MMC devices of sizes ranging from 10 mm2 to 1000 mm2 hotspot area via Silicon wafer microprocessing. Specifically, this study delves deep into the high aspect ratio (>10) anisotropic Silicon etching that is characteristic of such microfluidic devices. Additionally, we have provided insight into process development in Deep Reactive Ion Etching (DRIE) by discussing several issues that are frequently encountered during this deep Si etching step, namely, formation of black Si by photoresist micro-masking, high surface roughness resulting from deep etching and etch rate drop off. We have demonstrated the importance of tweaking etching and passivation cycle times during etching, by showing that merely 10% change in cycle times can eliminate these problems completely - this information is widely valuable to the Silicon microfabrication community. This study aims to document and disseminate a reliable high aspect ratio deep Si etching recipe that can be used to fabricate high performance large area microcooler devices, and will hopefully act as a starting point for fabrication efforts and new recipe development.