Abstract

In this paper, the implementation and characterization of high-sensitivity in-plane capacitive micro-gravity silicon-on-insulator (SOI) accelerometers with the readout circuitry are presented. The devices were implemented in 50 µm thick SOI substrates using a two-mask dry-release process. The fabricated accelerometers were interfaced to a low-noise low-power reference-capacitor-less switched-capacitor circuit. The integrated circuit (IC) was implemented in a 2.5 V 0.25 N-well CMOS process. The measured capacitive sensitivity is 0.3 pF g−1, equivalent to a gain of 0.75 V g−1. The measured resolution is 11 µg Hz−1/2 at 2 Hz and 0.2 µg Hz−1/2 at 100 Hz (resolution bandwidth = 1 Hz). The interface IC operates from a single 2.5 V supply and measures a power consumption of 4 mW with a sampling clock of 100 kHz. The core IC die size is 0.65 mm2.

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