Methodology for thermal evaluation of multichip modules

Abstract

Multichip modules provide shorter interconnection lengths between the chips, higher speeds and lower costs. This higher system performance is the driving force for advances in MCM packaging technology. A potential limitation is the ability to remove heat from these packages. With higher chip densities, the thermal management of multichip modules poses a real challenge to the package manufacturer. There is a need to define the junction-to-ambient and junction-to-case thermal resistances for multichip modules in a more rigorous manner while reducing the number of thermal tests needed to evaluate an MCM and provide information to predict junction temperatures under arbitrary powering up of the individual dice. For high reliability, it is critical that maximum specified operating junction temperatures are not exceeded. Experiments were performed for nonuniform powering up of an MCM mounted on a vertical board in natural and forced convection. The package tested was a 208-lead Amkor PMCM. The average chip temperature due to multiple sources within the module was considered as the reference temperature for evaluating the junction temperature rise of the particular chip. The concept of superposition of temperatures was found to capture the effect of the background heating of the chip due to its neighbors as well as the individual power dissipation from the chip in question. This approach offers a more refined methodology for evaluation of nonuniformly powered multichip modules compared to previous methods.