Method for evaluation of hysteretic interface properties and their application to anodisedinsb MIS diodes

Abstract

Metal-insulator-semiconductor (MIS) diodes were fabricated with InSb by anodisation process. They showed both high- and low-frequency C/V characteristics at liquid-nitrogen temperature. Large hysteresis of the charge injection type was also found for all samples. To avoid hysteresis effects when evaluating interface states, a new method for high-frequency capacitance measurement was proposed. The method makes use of the fact that hysteretic charge flow does not occur if the sweep range of the bias voltage is restricted within a small range. The entire range of C/V curve, which is necessary for evaluating the interface states, is constructed from a lot of narrow-swing C/V curves. Adequacy of this method was theoretically explained by a trap model of hysteresis, in which the traps are distributed spatially in the insulator close to the interface and are responsible for observed interface states and hysteresis. It was found experimentally by using anodic InSb MIS diodes that this method efficiently removed hysteretic charge flow from captures and emissions of electrons at the interface states. Results indicate that trap distribution in the energy scale is rather uniform and has a density of about 1016 eV−1 cm−3, which gives rise to the interface states density of the order of 102 eV−1 cm−2.