Metal gate effects on a 32 nm metal gate resistor

Abstract

CMOS technology scaling has allowed for unprecedented integration of analog and digital circuits onto a single chip. The integration of RF and analog circuits with digital logic has provided the consumer with wireless devices with high performance and increasing functionality but at lower cost. System-on-chip (SOC) is considered the ultimate goal for a low cost, high performance semiconductor chip for mobile products. At the 32 nm node, high-K and metal gate will be the mainstream gate stack in high volume manufacturing. In this paper, we will review SOC requirements with a focus on high-K / metal gate effects on analog passive devices. We will present a new metal gate resistor which can be programmed to exhibit either a positive , negative, or zero temperature coefficient (TC) by adjusting its physical dimensions. We will also discuss the trade-offs that RF / analog designers will have to take into consideration.