Mechanisms and models of interface trap annealing in positively-biased MOS devices

Abstract

Abstract We propose a hydrogen anion (H$^-$) passivation mechanism of the interface trap annealing (ITA) in positively-biased metal-oxide-semiconductor (MOS) devices. It is demonstrated that, the protons (H$^+$) released in SiO$_2$ due to H$_2$ cracking on oxide traps can migrate into Si at relatively high temperature, therefore passivating the interfacial $P_b$ centers by capturing two electrons provided by the positive bias. This new mechanism explains the elimination temperature of about 100$^\circ$C in experiments, which is much lower than temperature above 220$^\circ$C predicted by the traditional H$_2$ passivation mechanism. We also derive analytic models of the ITA, based on the coupling transformation dynamics of oxide and interface traps, as well as the concept of hierarchically constrained dynamics in glassy materials. These models can universally describe a generation-to-elimination transition of $P_b$, and predict the enhanced elimination of $E'_\gamma$ as the annealing temperature is elevated. Moreover, we demonstrate that, the defect annealing models can be applied to analysis the nonmonotonic temperature dependence of the annealing of threshold voltage shift in nMOS devices. Our findings provide a theoretical basis for achieving the low temperature elimination of interface traps, and for setting the high temperature stages of accelerated aging and damage evaluations of MOS devices.