Abstract
New digital communication receivers often oversample an intermediate frequency (IF) or baseband signal at a very high rate (16 to 32 times the IF frequency or bit rate) as a means to demodulate the encoded data and synchronize the recovered clock. Unfortunately, an asynchronous data source can result in metastable errors and its effect on communications system performance has not been analyzed before now. Fortunately, our results demonstrate the vitality of 1-bit quantized IF high-speed digital signal processing. We review a practical measurement technique using a digital sampling oscilloscope that can be easily applied to today's digital signal processing systems. This method is used to collect data on a high-speed digital gate array technology used for a digital communication receiver, and the statistics of packet error rate are calculated. The analysis shows the substantial robustness of fast gate array logic and the importance of selecting the right technology. The technique and analysis presented can be applied to other digital systems.
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