Measurement-based electrical characterization of through silicon vias and transmission lines for 3D integration

Abstract

Measurement-based electrical characterization of through silicon via (TSV) and redistribution layer (RDL) is of great importance for both fabrication process and system design of 3D integration. This paper presents the electrical measurements and analysis of TSV and double-sided RDL test structures, from DC to high frequency up to 40GHz. TSV shows great dependence of DC resistance and leakage current on fabrication process. An inverse V-shaped C–V curve is presented between adjacent TSVs in N-type silicon substrate, from −10V to 10V. In the high frequency characterization, two methods are proposed and applied to extract resistance and inductance of a single grounded TSV. Individual transmission loss of TSV, RDLs on top and bottom surface of silicon substrate are calculated, and corresponding circuit parameters thereof are extracted to characterize their electrical properties precisely.