Matrix Switch and Drive System for a Low-Cost Magnetic-Core Memory

Abstract

A unique system of ferrite-core matrix switches and drivers has been developed for a low-cost magnetic-core memory. The memory uses coincident-current techniques and has a capacity of 10,000 characters with seven bits per character. A 20-μsec read-compute-write cycle features serial-by-character processing. Approximately 7 μsec is computing time, and 13 μsec is read-write time. The matrix switch requires only two sets of five drivers to select one out of 100 individual outputs. The drivers operate in an unusual three-out-of-five coding arrangement. A Set and Reset a driver, each using four transistors in parallel, are also required for the matrix switch. Two matrix switches provide the 200 X-Y half-select drives for a 100 × 100 seven-plane core array. At read time, two half-select current pulses of 250 ma to 300 ma are emitted with an effective 10 per cent to 90 per cent rise time of 0.3 μsec. At write time, half-select current pulses with 1.2-μsec rise time are emitted on the same selected lines, but in the opposite direction. A new method of timing the drive current allows the read pulse to rise in 0.3 μsec, even with a low-voltage power supply and an inductive load that would otherwise limit the rise time to 0.8 μsec. All current-driving circuits use alloy junction transistors. The drive current is furnished from a 10 to 12 volt power supply, and temperature compensation of the drive currents is accomplished through control of power-supply voltage. Operating temperatures range from 10°C to 40°C.