Mathematical Framework of Tetramorphic MWCNT Configuration for VLSI Interconnect

Abstract

Having a 1D material like Multiwall Carbon Nanotube (MWCNT) as a potential candidate for high speed Very Large Scale Integration (VLSI) interconnect creates a good scope to reduce the delay by estimating the parasitic elements i.e. Resistance ( $R$ ), Inductance ( $L$ ) and Capacitance ( $C$ ) properly. We have contrived an innovative configuration namely Tetramorphic (TM) for the bundle of MWCNTs with four different diameters. We have focused on 45 nm, 22 nm, 11 nm and 7 nm technology nodes to justify the novelty of our proposed configuration over the existing MWCNT bundle configurations. Having the parasitic $RLC$ elements for a specific technology node, the diameter optimization took place in this work. Subsequently, we obtain the propagation delay results for local, semi-global and global level interconnect. Finally, we compare the results with the other existing configuration to show the supremacy of our introduced configuration for MWCNT bundle to explore high speed VLSI interconnect and represent crosstalk delay and power dissipation. Moreover, this configuration is highly dense which will offer the size shrinkage feature in a substantial manner.