Material and device technologies for advanced, high-performance, and radiation-hardened CMOS circuits

Abstract

CMOS has clearly become the technology of choice for integrated circuits in the majority of advanced application areas, and CMOS/bulk, although it faces new challenges with the persistent push to smaller device feature sizes, will continue to evolve as the mainstream technology for many years. The problems associated with small feature-size devices are compounded when radiation hardness requirements are imposed upon circuits, and this additional requirement has spawned the developing of a variety of complex, nonstandard, CMOS/bulk processes. In contrast CMOS/SOS technology, with only minor modifications to a commercial production process, is able to produce circuits that can satisfy the requirements associated with very severe radiation environments and is now gaining wide acceptance in the military and aerospace marketplace. Recent data also indicate that CMOS/SOS will maintain its relative performance advantage over CMOS/bulk as device sizes are scaled downward. Emerging silicon-on-insulator technologies other than SOS, if they can be implemented in production and are proven to be cost effective, may also provide solutions to problems associated with device isolation in small geometry devices. In this paper, the various implementations of CMOS technology are reviewed with emphasis given to issues associated with substrate materials and with radiation hardness in small feature-size devices.