MASH 1-1-1 CTΔΣM with FIR DAC and Loop-Unrolling Quantizer

Abstract

This chapter discusses the design of a MASH 1-1-1 CTΔΣM employing finite impulse response (FIR) digital-to-analog converters (DACs) and encoder-embedded loop-unrolling (EELU) quantizers. The presented MASH 1-1-1 topology is a cascade of three single-loop first-order CTΔΣM stages. Each stage consists of an active-RC integrator, a current-steering DAC, and an EELU quantizer. An FIR filter in the main 1.5-bit DAC improves the modulator’s jitter sensitivity performance. The FIR’s effect on the noise transfer function (NTF) of the modulator is compensated in the digital domain, thanks to the MASH topology. Instead of employing a conventional analog direct feedback path, a 1.5-bit EELU quantizer based on multiplexing among comparator outputs is presented. Fabricated in a 40-nm low-power CMOS technology, the modulator’s prototype achieves a 67.3 dB of signal-to-noise and distortion ratio (SNDR) within 50.5 MHz of bandwidth (BW), consuming 19.0 mW of total power (P).