Abstract
Architecture Analysis and Design Language (AADL) has been utilized to specify and verify nonfunctional properties of Real-Time Embedded Systems (RTES) used in critical application systems. Examples of such critical application systems include medical devices, nuclear power plants, aerospace, financial, etc. Using AADL, an engineer is enable to analyze the quality of a system. For example, a developer can perform performance analysis such as end-to-end flow analysis to guarantee that system components have the required resources to meet the timing requirements relevant to their communications. The critical issue related to developing and deploying safety critical systems is how to validate the expected level of quality (e.g., safety, performance, security) and functionalities (capabilities) at design level. Currently, the core AADL is extensively applied to analyze and verify quality of RTES embed in the safety critical applications. The notation lacks the formal semantics needed to reason about the logical properties (e.g., deadlock, livelock, etc.) and capabilities of safety critical systems. The objective of this research is to augment AADL with exiting formal semantics and supporting tools in a manner that these properties can be automatically verified. Toward this goal, we exploit Petri Net Markup Language (PNML), which is a standard acting as the intermediate language between different classes of Petri Nets. Using PNML, we interface AADL with different classes of Petri nets, which support different types of tools and reasoning. The justification for using PNML is that the framework provides a context in which interoperability and exchangeability among different models of a system specified by different types of Petri nets is possible. The contributions of our work include a set of mappings and mapping rules between AADL and PNML. To show the feasibility of our approach, a fragment of RT-Embedded system, namely, Cruise Control System has been used.
Highlights
The Society of Automotive Engineers (SAE) developed Aerospace Standard AS5506 [1], the Architecture Analysis & Design Language (AADL) and its supporting toolset Open Source Architectural Tool Environment (OSATE), for the model-based engineering (MBE) of Real-Time Embedded Systems (RTES)
In [3], the focus was on the behavioral analysis of AADL by means of Petri Net Models; this study provides a useful illustration of how to take advantage of Petri nets and utilize their capabilities for analyzing the properties such as deadlock detection and dimensioning
This study discussed how AADL representations can be augmented by capabilities supported by various types of Petri nets via Petri Net Markup Language (PNML), which acts as intermediate representation (IR)
Summary
The Society of Automotive Engineers (SAE) developed Aerospace Standard AS5506 [1], the Architecture Analysis & Design Language (AADL) and its supporting toolset Open Source Architectural Tool Environment (OSATE), for the model-based engineering (MBE) of Real-Time Embedded Systems (RTES). AADL, which is based on a component-connector architectural paradigm, supports many features such as multi-dimensional analyses, code generations, model-transformations, etc. These features are essential in specification and verification of the front-end and back-end engineering of RTES used in safety critical systems [2] [3]. Using AADL and supporting tools developers can analyze a model of a safety critical system for different types of qualities. A flat Petri net (or classical net) can be considered to be a labeled directed graph where the labels represent all the specific information of the net It may be associated with a node (places, transitions), arc or net. Arc represent relationships or flow of information between places and transitions [8]
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