Abstract
AbstractKey issues associated with the self-aligned silicide technology, such as formation of silicides on narrow poly gate, shallow silicided junction formation, gate to source/drain bridging, and interface contact resistance, are discussed. The comparison of important technological aspects for TiSi2 and CoSi2 is presented. The emphasis of this work is focused on the CoSi2 salicide technology with different variations, namely conventional process, Co/Ti capping process, and Ti/Co process. Based on the experimental results, CoSi2 should be considered as an attractive alternative to TiSi2 for the applications in sub-0.25 μm ULSI integrated circuits.
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