Abstract
Spintronic logic devices have attracted attention because of the prospect of breaking the von Neumann bottleneck through nonvolatile in-memory computing. Although varieties of spin Boolean logic gates have been proposed, spintronic arithmetic logic units such as adders have not been extensively studied because of the difficulties in application of the cascade method of CMOS-based logic in spintronic devices. We experimentally demonstrated a spintronic full adder based on the anomalous Hall effect and geometrical tuning magnetization switching driven by spin-orbit torque. The anomalous Hall effect of magnetic bits was enhanced by nonlinear elements with N-type negative differential resistance to control the <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on/off</small> state of <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s, which determined the write voltage of the memory unit. The magnetizations of the memory bits in the memory unit were switched one by one as write voltage increased because of geometry difference. The order of magnetization switching caused the response of the anomalous Hall voltage of the memory unit to the input configurations to conform with the logic function of the full adder. The computation function of the full adder combined with memory writing was experimentally realized with only seven magnetic bits and two steps. The reduced number of magnetic bits and time steps indicated the efficiency of space and time of our device, which is beneficial for practical applications.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call