Abstract

ABSTRACT When applying OPC techniques in manufacturing of complex and delicate integrated circuits, any improvement in accuracy of computing aerial images is crucial. Simulation accuracy is demanded more and more today as the feature sizes are being decreased, while the computation speed has to be kept in a reasonable pace. As a consequence, loss of symmetry in simulation appears to be more problematic and has begun to require attention. Quantization, sampling and intensive iterative computation are all sources of the problem. In this paper, we study the problem of symmetry preservation, present a method of symmetry enhancement, and apply the method in process simulation. The computing results of this method are satisfactory and promising, having laid a foundation for future study on its application in OPC, and of its effect on the performance of certain symmetric IC patterns. Keywords: Aerial images, Optical Proximity Correction, Symmetry 1. INTRODUCTION OPC and other resolution enhancement techniques (RET) are playing an important role in today’s integrated circuit manufacturing. Designers may have to understand how the design being worked on will be patterned on silicon after these RET techniques are applied. The quality of design/lithography integration as well as the quality of OPC methods largely depends on the accuracy of the simulation and the process models that we use for modeling the manufacturing procedures of the optical lithography process. It is very much desired to improve the accuracy of computing aerial images when considering applying OPC techniques in the manufacturing of complex and delicate integrated circuits, for example, for circuits with minimum feature sizes smaller than 0.13 micron. In this paper, we present our study of a computational phenomenon we observed in lithography process modeling. Our basic idea is to provide an auto-correction mechanism that can enhance the symmetry property of aerial images, if the patterns on a mask and the patterns of illumination of a stepper are both symmetrical. Our test shows that this symmetry-enhanced modeling method for steppers can give better fidelity of lithography simulation, can yield better OPC results, and therefore benefit IC design engineers to better capture IC manufacturing effects during the design process.

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