Abstract
This paper presents a method to predict perform processor cores in a reconfigurable system for embe dded applications. A multiprocessor framework is developed with the capability of reconfigurable processors in a shared memory system optimized for stream signal processi ng applications. The framework features a discrete time Markov based stochastic tool, which is used to analyze mem ory contention in the shared memory architecture, and to predict the performance increase (speed of execution) when the number of processors i variations of other system parameters, such as diff erent task allocations and the number of pipeline stages are possible were verified by experimental results of a green sc re and run on a Xilinx Virtex
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