Abstract
In this paper, a high-voltage silicon-on-insulator lateral insulated gate bipolar transistor (SOI-LIGBT) for high turn-off speed and low turn-off loss (E OFF ) is proposed. The device features an Assistant-Depletion Trench (ADT) shorted with the P+ emitter and a partial P-type Buried Layer (PBL) at the bottom of the drift region. The ADT together with the PBL accelerates the depletion of the drift region, which benefits to fast extraction of stored carrier during turn-off period. The simulations demonstrate that the proposed SOI-LIGBT exhibits a superior tradeoff between turn-off loss (E OFF ) and on-state voltage drop (V ON ) to the conventional SOI-LIGBT. E OFF of the proposed SOI-LIGBT is 69% lower than that of the conventional SOI-LIGBT at the same V ON of 1.53 V.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
