Low-frequency passive RFID systems implementation in CMOS technology

Abstract

Radio Frequency Identification (RFID) systems are widely used in a variety of tracking, security and tagging applications. Passive low-frequency (LF) RFID systems have a large installed base, mostly used for animal tagging and supply chain applications. Passive RFID tags generate their power from the incoming signal; therefore, they do not require a power source. Accordingly, minimizing the power consumption and the implementation area are usually the main design considerations. This paper presents a complete analysis on designing a passive LF RFID tag in CMOS process. A complete architecture for a LF passive RFID tag is presented and analyzed, together with a brief discussion of its main building blocks such as rectifier, voltage clamps, modulator, voltage regulator and voltage/current references. The IC was fabricated in 0.6µm CMOS process. The tag system uses a carrier frequency of 134.2kHz, 128bit one-time programmable memory, DBP codification and ASK modulation in the reverse link (tag to reader). Measurement results are given.