Low‐Voltage, Printed, All‐Polymer Integrated Circuits Employing a Low‐Leakage and High‐Yield Polymer Dielectric

Abstract

AbstractIn the path toward the integration of organic field‐effect transistors (OFETs) and logic circuits into low‐cost and mass produced consumer products, all‐organic devices based on printed semiconductors are one of the best options to meet stringent cost requirements. Within this framework, it is still challenging to achieve low voltage operation, as required by the use of thin film batteries and energy harvesters, for which a high capacitance and reliable organic dielectric is required. Here, the development of a parylene‐C based dielectric bilayer compatible with top‐gate architectures for low‐voltage OFETs and logic circuits is presented. The polymer bilayer dielectric allows the high yield fabrication of all‐polymer, bendable, transparent p‐ and n‐type OFETs operating below 2 V, with low leakage, uniform performances, and high yield. Such a result is a key enabler for the reliable realization of complementary logic circuits that can operate already at a voltage bias of 2 V, such as well‐balanced inverters, ring‐oscillators and D‐Flip‐Flops.