Abstract
The use of high κ dielectrics lowers the operating voltage in organic field-effect transistors (FETs). Polymer ferroelectrics open the path not just for high κ values but allow processing of the dielectric films via electrical poling. Poled ferroelectric dielectrics in p-type organic FETs was seen to improve carrier mobility and reduce leakage current when compared to unpoled devices using the same dielectric. For n-type FETs, solution-processed ZnO films provide a viable low-cost option. UV–ozone-treated ZnO films was seen to improve the FET performance due to the filling of oxygen vacancies. P-type FETs were fabricated using the ferroelectric polymer poly(vinylidene fluoride-trifluoroethylene) (PVDF-TrFE) as the dielectric along with a donor–acceptor polymer based on diketopyrrolopyrrole (DPP-DTT) as the semiconductor layer. The DPP-DTT FETs yield carrier mobilities upwards of 0.4 cm2/Vs and high on/off ratios when the PVDF-TrFE layer is electrically poled. For n-type FETs, UV–ozone-treated sol–gel ZnO films on SiO2 yield carrier mobilities of 10−2 cm2/Vs. DPP-DTT-based p- and ZnO-based n-type FETs were used in a complementary voltage inverter circuit, showing promising characteristic gain. A basic inverter model was used to simulate the inverter characteristics, using parameters from the individual FET characteristics.
Highlights
The air-stability of n-type organic field-effect transistors (FETs) still remains a challenge.The intrinsic n-type behavior of ZnO provides an alternate path towards low-cost and air-stable FETs, and when integrated with p-type organic FETs, allows the realization of a basic digital circuit
We have shown that electrical poling of the polyvinylidene fluoride (PVDF)-TrFE layer is an effective means of enhancing carrier mobilities and other transport properties in FETs [24]
An order of magnitude higher carrier mobility, which was extracted in the saturation region, is seen for the texture-poled device compared to the vertically poled (V-poled) device
Summary
The intrinsic n-type behavior of ZnO provides an alternate path towards low-cost and air-stable FETs, and when integrated with p-type organic FETs, allows the realization of a basic digital circuit. As known from complementary metal oxide semiconductor (CMOS) technology, the fundamental element of a digital static circuit is a CMOS inverter, which connects an n-metal oxide semiconductor FET (MOSFET) and a p-MOSFET to achieve simple logic functions. The area of digital circuits based on solution-processed semiconducting films requires robust n- and p-type FETs. The non-toxicity and low-cost sol–gel processing conditions for depositing ZnO makes it attractive for the development of n-FETs. As such, several methods such as atomic layer deposition [1], pulsed laser deposition [2,3], spray pyrolysis [4], hydrothermal deposition [5], and chemical and other physical vapor deposition methods [6] have been used to deposit hierarchical architectures of ZnO in addition to sol–gel processes [7,8]
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