Low voltage Flash memory design based on floating gate SOFFET

Abstract

Flash memory is widely used, especially for mobile applications, as nonvolatile memory storage. In this paper, we present a Flash memory design based on Silicon on Ferroelectric-Insulator FET (SOFFET) device. This device has shown tremendous potential for various ultra-low-power (ULP) applications. SOFFET has the potential to provide high performance, multi-V T design, strong threshold voltage control, low voltage operation, and below 60mV/decade subthreshold swing. The proposed approach utilizes conventional floating gate on SOI architecture with an additional ferroelectric insulator layer. The threshold voltage of the device is influenced by the charge accumulation on the floating gate as well as a control voltage. Due to the ferroelectric layer which allows the formation of negative capacitance effect inside a transistor, the presented Flash memory cell can be turned at a lower electric field. As a result, both program and erase operations can be performed at a lower voltage, making it ideal for low-power application. Moreover, the proposed Flash memory is compatible with conventional SOI fabrication process with minor adjustment.