Low voltage flash memory by use of a substrate bias

Abstract

The enhancement of the gate current in MOSFET devices by use of a substrate bias has been explained by a second impact ionization event at the drain-to-substrate junction. Hot electron luminescence measurements confirm this interpretation showing that only the high-energy tail of the electron distribution is affected by the substrate bias. This phenomenon has been applied to a FLASH memory array to increase the injection efficiency. Low voltage and good control of disturbs has been demonstrated in a 0.5 Mbit embedded FLASH array using substrate bias during programming.