Abstract

In this paper, a new extended true-single-phase-clock (E-TSPC) based divide-by-2/3 prescaler is proposed for low supply voltage and low power consumption applications. By using pass transistor logic and changing the logic gates, the critical path between the E-TSPC flip-flops has been reduced. Prescaler is designed by Cadence in chartered 0.18 µm CMOS process. Simulation results show that proposed dual-modulus prescaler can work up to 3.9 GHz under 0.9 V supply voltage with 226 µW power consumption and it is suitable for low power and high speed frequency synthesizer in wireless communication system.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call