Abstract
The complexity of microelectronic circuits, their scale of integration and clock speed requirements have been increasing steadily. All these changes have the effect of increasing the power density of the microcircuits. ICs with a power of several watts and an area of over a square centimetre are quite common. Thus, there is more heat generated per device at die, component and substrate‐attach levels of electronic packaging. In order to maintain reliability of finished products, the junction temperature of the constituent devices must be kept low. It has been demonstrated that thermal management can be one key to lowering the cost and increasing the performance life of microelectronic products. The cost‐effectiveness of lowering device temperature has been demonstrated to be dramatic compared with the cost of thermal management materials. Proper thermal management of advanced microelectronic devices has to be addressed at all levels. One should address the problem from the basic level of die‐attach, through component‐attach, and eventually substrate‐attach to thermal drains. Thermal management is almost invariably coupled with a thermally induced stress problem. The increase in temperature at the device level also means a larger fluctuation of temperature from the ambient. Each cycle of on‐off for the device represents one thermal cycle. Stress‐induced failure due to coefficient of thermal expansion (CTE) mismatch is much more acute for higher power devices. In this paper, the authors address the issue of thermally induced stress on the microelectronic product at all levels of packaging, with major emphasis on component and substrate levels. Various ways and examples of reducing or eliminating this stress, which is a major cause of device failures, will be demonstrated. One of the proven methods is through the use of low Tg epoxies with high thermal stability.
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