Abstract
The development of flexible Complimentary Metal-Oxide-Semiconductor (CMOS) circuits reduces power consumption by ∼50x compared to n-type (or p-type) only thin film transistor (TFT) digital circuits. In this work we demonstrate a new integration approach to fabricate CMOS circuits on plastic substrates (Poly-ethylene naphthalene, PEN). We use pentacene and amorphous silicon (a-Si:H) thin film transistors for p-type and n-type devices, respectively. The maximum processing temperature for n-type TFTs is 180°C and 120°C for the p-type TFTs. CMOS circuits demonstrated include inverters, NAND and NOR gates. nMOS and pMOS carrier mobility achieved after the CMOS integration process flow are 1.0 and 0.05 cm2/V-s, respectively. Threshold voltages (V t ) are 3.89V for nMOS and −1.89V for pMOS. The voltage transfer curve of the CMOS inverter showed a gain of 16. Correct logic operation of integrated flexible NAND and NOR CMOS gates are reported.
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