Low-Sidelobe Microstrip Patch Filtenna Array Fed by Higher Order Mode SIW Cavity

Abstract

In this letter, a 1 × 3 microstrip patch (MP) filtenna array with low sidelobe level fed by TE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">410</sub> -mode substrate integrated waveguide (SIW) cavity is investigated. Benefiting from the fact that the magnetic field amplitude at the adjacent region of the two central quasi-TE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">110</sub> modes of the TE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">410</sub> -mode SIW cavity is twice that of the single quasi-TE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">110</sub> mode on either side of the edge, it enables the filtenna array to obtain a binomial power distribution and then achieve low sidelobe level. In the fusion design of filtering power divider (FPD), the SIW cavity and the patch radiators are regarded as first and second resonators of filter respectively, meanwhile, the power dividing function is fulfilled by the coupling process between them. For demonstration, a filtenna array prototype centered at 13.2 GHz is designed, fabricated and measured. The measured results show that a peak gain of 11.6 dBi and a maximum efficiency of 85%. The measured sidelobe levels in <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">E</i> -planes are both below than -19.1 dB at 13.06 GHz and 13.32 GHz. Good agreement between the simulation and measurement can be observed.