Low Power Squarer Design Using Ekadhikena Purvena on 28nm FPGA

Abstract

EkadhikenaPurvena is a Sanskrit name which means “one more than the previous”. This technique is used for squaring any big number but the condition is it should end with digit “5”. Vedic mathematical formulas are used to solve tedious and cumbersome arithmetic operations. Tool is Xilinx ISE Design Suite 14.2 and Kintex-7. We have taken different frequencies and calculated its power. Today’s demand forces us to design the low power energy efficient devices which takes lesser time for its execution. In our design there are 2 inputs and 1 output. The inputs are clocked and the number whose square we are supposed to calculate is 8 bits wide and the output is 14 bits wide (squared number). Many researchers have performed research on Vedic mathematics to solve DSP operations using Urdhava-Triyagbhayam multiplication sutra. We have done power analysis by varying frequency at different temperatures to make our Vedic squarer energy efficient. Temperatures taken in view are 56.7, 53.5, 40, 21 degree Celsius and Airflow is 250 LFM (Linear Feet Per Minute). Analysis results shows that the maximum power consumption is at 2.2 Billion Hertz and minimum power consumption is at 1400 Million Hertz. In respect to temperature maximum power is consumed at 56 o C and minimum at 21 o C.