Abstract
Ternary Content Addressable Memory (TCAM) is emerging as a hardware solution for high performance router by supporting an internal routing table for fast search despite the burden on dynamic power and speed loss due to Longest Matching Prefix (LMP) selection. In this paper, we propose a Higher Priority First Out (HiPFO) memory architecture that outputs only the LMP in a single cycle using a nonvolatile TCAM (nvTCAM), and power reduction schemes that selectively activates search lines and cell array. Thanks to these techniques, encoding power and dynamic power is improved by 86% and 68% respectively and latency is 47% better than the conventional nvTCAM. A 64bitx32 nvTCAM fabricated using 18onm-CMOS technology demonstrates HiPFO operation.
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