Abstract
This paper presents a low-power, fully reconfigurable finite impulse response (FIR) filter structure based on common operation sharing. Different from existing multiplexer(MUX)-based designs, the decoding of coefficients and compensation of negative-coefficient errors, which are the common operations for all the taps, are implemented by shared modules to reduce the overall hardware complexity. To validate the proposed structure, a proof-of-concept reconfigurable FIR filter is implemented and fabricated using 40 nm CMOS technology. Chip measurement results show that the proposed design is superior to existing methods in area-delay product and power performance, making it suitable for low-power filtering applications. The idea of sharing common operations for all taps can benefit the existing MUX-based filter techniques for further improvement of power and circuit complexity.
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