Abstract
In this paper, a 10-bit 40-MS/s analog-to-digital converter (ADC) is presented. A power consumption of 12 mW was achieved by using a time-interleaved and pipelined architecture with shared operational amplifiers. This circuit was fabricated in a 2.5-V 0.25-/spl mu/m technology with metal-oxide-metal capacitors. Experimental results are within design ranges and are in good agreement with simulation data. It turns out that the proposed Nyquist-rate ADC provides a potential solution for low-power high-speed applications, e.g., wireless LANs.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
