Low-power multirate architecture for IF digital frequency down converter

Abstract

In this paper, a novel low-power multirate architecture for an IF digital frequency downconversion process is presented. The architecture design is the combination of 4-IF oversampling technique and multistage interpolated finite impulse response (IFIR) filter design based on the multirate algorithm. It can have very low-power dissipation owing to its reduction in hardware complexity and operational frequency. The design example shows that it consumes only 24% of the power of the direct implementation while occupying 26% less area.