Low power motion estimation algorithm based on temporal correlation and its architecture

Abstract

We propose architecture of low power motion estimation algorithm. There are two types of MB (macro block) modes in the proposed algorithm (fast MB mode and normal MB mode). In the fast MB mode, the motion vector found from the previous frame is utilized in the next frame. This mode can be adopted in the conventional fast motion estimation algorithm, and as a result, the computational power is reduced by 40%. In normal the MB mode, among the conventional fast search algorithms, we take the 4SS (four step search), and introduce an additional search method called a center-focused search in the step to increase the PSNR level. We then, implement the corresponding PE (processing element) architecture that gives the hardware performance improvement. The new motion estimation architecture is especially efficient for mobile phone and video conferencing applications in which there is not much motion.