Abstract

In recent years demand of low power devices is increasing and the reason behind this is scaling of CMOS technology. Due to the scaling, size of the chip decreases and number of transistor in system on chip (SOC) increases and this phenomenon also apply on memories that are used in SOC. Generally the number of transistors used in chip to store data is more as compared to the number of transistors used for other function. So in future the need of low power memories is increasing and to design low power memories leakage power is attentive parameter to design low power devices because it plays a major role in increasing the total power consumption of the devices. In this paper, 7T simple SRAM and technique based 7T SRAM has been designed and parameters like total power and leakage power has been calculated. SRAM (Static Random Access Memory) is a type of memory that provide a link with CPU and designing of SRAM is very critical because it takes large part of power and area therefore to achieve low power SRAM we have designed Memristor based SRAM. Memristor is a forth missing non-linear resistor which acts as memory and it improves the power and speed. It is invented in 1971 by L. O. Chua and in this paper MTCMOS (Multi Threshold CMOS) technique is used, recently it is very famous in academia and industry. It is a power reducing technique that helps in reducing leakage power in the SRAM by turning of the inactive circuit domains. Designing and calculation of parameters of simple SRAM, Memristor based SRAM and MTCMOS based Memristor SRAM has been done with cadence virtuoso tool and that was done at 45 nm technology with the operating voltage of 0.7 volt.

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