Low-Power, High-Sensitivity Temperature Sensor Based on Ultrathin SOI Lateral p-i-n Gated Diode

Abstract

In this work, we present a silicon-based p-i-n thermal diode, with post-CMOS MEMS processing (deep reactive ion etching and Al deposition) and annealing (at 250 °C). The MEMS processing degraded device stability as well as thermal sensing linearity and sensitivity, while the local annealing recovered the device performance (forward and reverse characteristics) by reducing the trap density and improving the carrier lifetime. After annealing, the on-membrane diode can achieve stabilized thermal linearity with a high sensitivity of ~ 2.25 mV/°C at 0.02– $0.03~\mu \text{A}$ low constant current, in the temperature range from room temperature to 200 °C, under a back-gate bias of 90 V to achieve a fully-depleted condition in the intrinsic (I) region and decrease the trap-assisted recombination at the front surface which dominates and degrades the device forward output current. To be compatible with commercial 1.0- $\mu \text{m}$ SOI CMOS technology, a front gate with a 25-nm-thick oxide dielectric is proposed and simulated in Atlas/SILVACO to optimize the device performance and achieve the same thermal characteristics under a front-gate bias of 1.0 V, showing its potential in low-power consumption electronics. The temperature sensor investigated in this work shows its industrial capability in gas sensing and integrated circuit applications.