Abstract
The development a high-performance design of analog circuits becomes increasingly challenging with the continuous trend towards reducing the voltage supply and low power consumption without neglecting the trade-off among other performance parameters. This paper presents the design and implementation of CMOS operational amplifier (op-amp) with integrated common-mode feedback (CMFB) circuit for data converter using 0.13-μm Silterra CMOS technology. The folded cascode topology is employed as a main op-amp design because it provides high gain and high bandwidth besides low power consumption. The simulation results indicate that the DC gain of 64.5 dB along 133.1 MHz unity gain bandwidth (UGB) is achieved for a 1 pF load capacitor. The slew rate of 22.6 V/μs, the phase margin (PM) of 68.4° with settling time of 72.4 ns are obtained. The power consumption of this op-amp is 0.3 mW through voltage supply of 1.8 V.
Highlights
Wireless Operational amplifier is a core element and integral part for most analog and mixed-signal systems
As a requirement of a high speed and high accuracy in pipeline ADC, there are numerous constraint parameters that should be considered such as gain, unity gain bandwidth, phase margin, slew rate and output swing
The purpose of phase margin (PM) is to determine the stability of the amplifier where the higher values of PM will allow the output signal to achieve a stable state without much swing
Summary
Wireless Operational amplifier is a core element and integral part for most analog and mixed-signal systems. Op-amp can be classified into several topologies which are telescopic, folded cascode, two-stage and gainboosted [1]. Each topology has their own compensation, but they can be applied in any design op-amp circuit by considering the performance parameter. A telescopic op-amp is a simple topology and provided a high gain as well faster performance [2, 3]. This topology is called as ‘telescopic’ because the cascades are attached between the voltage supplies with the transistor in the differential pair, occurs in a structure where each branch of the transistor connected directly together in a straight line [4]. The telescopic topology has a slighter swing because of lesser current legs and produces a small power consumption and low noise
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