Abstract
This paper presents the design of a two-stage bulk-input pseudo-differential operational transconductance amplifier (OTA) and its application in active-RC filters. The OTA was designed in 90 nm CMOS process and operates at a single supply voltage of 0.5 V. Using a two-path bulk-driven OTA by the combination of two different amplifiers the DC gain and speed of the OTA is increased. Rail-to-rail input is made possible using the transistor’s bulk terminal as in input. Also a Miller-Feed-forward (MFF) compensation is utilized which is improved the gain bandwidth (GBW) and phase margin of the OTA. In addition, a new merged cross-coupled self-cascode pair is used that can provide higher gain. Also, a novel cost-effective bulk-input common-mode feedback (CMFB) circuit has been designed. Simplicity and ability of using this new merged CMFB circuit is superior compared with state-of-the-art CMFBs. The OTA has a 70.2 dB DC gain, a 2.5 MHz GBW and a 70.8o phase margin for a 20 PF capacitive load whereas consumes only 25 µw. Finally, an 8th order Butterworth active Biquadrate RC filter has been designed and this OTA was checked by a typical switched-capacitor (SC) integrator with a 1 MHz clock-frequency.
Highlights
There are growing strong demands for low-voltage supply and low-power consumption circuits and systems
This paper presents the design of a two-stage bulk-input pseudo-differential operational transconductance amplifier (OTA) and its application in active-RC filters
This paper presents the design of a novel two-stage bulk-input pseudo differential OTA, which operates at a supply voltage of 0.5 V
Summary
There are growing strong demands for low-voltage supply and low-power consumption circuits and systems. Taking the tail current source achieves a larger signal swing, but it results in larger CM gain It requires to carefully controlling the CM response for pseudo differential OTAs. The reduced supply voltage will cause many problems when designing analog circuits due to the reduction in available signal swing. One solution for designing low-voltage analog circuits is to operate the transistors in the weak inversion region The drawbacks to this technique include a limited input signal swing, an increase in the mismatch between transistors, a low slew-rate due to the low bias current levels, and large transistor sizes [3,4,5,6]. The gate inputs biased at 100 mV, which biases them in moderate inversion These transistors are a self-cascode active load for transistors M4+ and M4– which are common source amplifiers
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