Low power building block for artificial neural networks

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The authors propose and analyse a low-power CMOS building block for artificial neural networks (ANNs) that can function either as a synapse or a neuron. The design is based on the current-mode approach and uses the square-law characteristics of a MOS transistor working in saturation. The new building block uses I-V converters, a current-mirror and a ± 1 V power supply to achieve superior performance. Modularity, ease of interconnectivity, expandability and reconfigurability are the advantages of this building block.