Low Power and Area Efficieny ALU With Different Type of Low Power in Full Adders

Abstract

This paper presents a low power area efficient of a ALU using different low power full adders. Classified as XNOR logic, pass transistor, 2T XOR logic. The 4-bit ALU design is compared with respect in their power consumption and area. ALU is an operating system named as Arithmetic and Logic Unit, which perform arithmetic operation like ADD, SUB, PASS THROUGH TWO'S COMPLEMENT etc. and logic operation like AND,OR,EXCULSIVE OR,EXCLUSIVE NOR etc. We introduce different types of full adders, which are taken as 6T XNOR logic, 6T 2t XOR Logic and pass transistors using 6T to produce sum and multiplexers are used for carry. Full adder is a part of an ALU, it can be used with varying Transistors. By reducing full adder power, we can reduce the power of ALU. Compared with existing technique power can be decreased by <50% by changing full adders. The simulation is carried in cadence virtuoso 90nm technology. Compared with the previous design of gate diffusion input, the results shows area efficient and low power with existing work.